The
74AC138 is an advanced high-speed CMOS 3 TO 8 LINE DECODER(INVERTING) fabricated with sub-micron silicon gate and double-layer
metal wiring C2MOS tecnology.If the device is enabled, 3 binary select inputs (A,B, and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go to high. Tree enable inputs are provided to ease cascade connection and application of address decoders for memory systems.All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage